- FPGA/ASIC front-end and/or back-end design
- Interpret high level specifications and map to outline architectures.
- Architect and design solutions to accelerate our infrastructure
- Verification and validation of design blocks
- Implement solutions from the board to API and deploy out to a production environment, using creative patterns to maximise performance.
- Interact with software teams to capture and design solutions in hardware.
- B.Sc. or equivalent/higher in a technical discipline
- Minimum 3 years in ASIC or FPGA digital design and/or verification.
- Ability to absorb mathematical algorithms and develop high-performance implementations.
- Strong interpersonal and communication skills for interacting with traders, quantitative analysts, and other engineers
- A desire to develop excellent solutions used daily and a passion in contributing throughout a technology environment.
- Knowledge of C/C++/C# coding and SW driver applications is a plus.
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FPGA Engineer - Dublin, Ireland - SIG
Description
Overview
You will be required to work as part of a team to design and verify high performance hardware systems. This requires a knowledge of FPGA and/or ASIC design, tools and flows to map high speed designs efficiently and optimally onto the target technology. Knowledge of TCP/IP, integrating and bringing up PCIe/Ethernet cores and high-speed interfaces is desirable, with experience of x86 architecture on Windows a plus. The successful candidate will contribute to bringing the vision from concept through to production involving hardware selection, front end and back end design, driver interaction, and SW interface.
This is an excellent chance to put your stamp on exciting and challenging uses of digital technology in innovative and thought provoking projects that will require you to use a spectrum of design and project management skills.
What we're looking forAbout You:
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SIG does not post salary information, so any salary information you find online may not be accurate because it was not provided or verified by SIG.